diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 29995ea..16adf6e 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -119,7 +119,7 @@
 	mx27_fec_init_pins();
 #endif
 
-#ifdef CONFIG_MXC_MMC
+#ifdef CONFIG_MMC_MXC
 	mx27_sd2_init_pins();
 	imx_gpio_mode((GPIO_PORTF | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 16));
 	gpio_request(PC_PWRON, "pc_pwron");
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index 4fb36a2..f78c007 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -28,7 +28,7 @@
 }
 #endif
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index 43931b0..54eef6c 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -13,7 +13,7 @@
 #include <asm/arch/pinmux.h>
 #include <asm/gpio.h>
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 52f914d..37d2f54 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -24,7 +24,7 @@
 #include <linux/errno.h>
 #include <hwconfig.h>
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 #include <mmc.h>
 #include <asm/arch/sdmmc_defs.h>
 #endif
@@ -197,7 +197,7 @@
 	return 0;
 }
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 static struct davinci_mmc mmc_sd0 = {
 	.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
@@ -219,7 +219,7 @@
 	/* GP0[11] is required for NOR to work on Rev 3 EVMs */
 	{ pinmux(0), 8, 4 },	/* GP0[11] */
 #endif
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	/* GP0[11] is required for SD to work on Rev 3 EVMs */
 	{ pinmux(0),  8, 4 },	/* GP0[11] */
 #endif
@@ -250,7 +250,7 @@
 	PINMUX_ITEM(emifa_pins_nor),
 #endif
 	PINMUX_ITEM(gpio_pins),
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	PINMUX_ITEM(mmc0_pins),
 #endif
 };
@@ -263,7 +263,7 @@
 	{ DAVINCI_LPSC_EMAC },	/* image download */
 	{ DAVINCI_LPSC_UART2 },	/* console */
 	{ DAVINCI_LPSC_GPIO },
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	{ DAVINCI_LPSC_MMC_SD },
 #endif
 };
@@ -368,7 +368,7 @@
 	writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
 #endif
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	/* Set the GPIO direction as output */
 	clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
 
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index 9c1a483..3ce1992 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -20,7 +20,7 @@
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/davinci_misc.h>
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 #include <mmc.h>
 #include <asm/arch/sdmmc_defs.h>
 #endif
@@ -29,7 +29,7 @@
 
 #define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 /* MMC0 pin muxer settings */
 const struct pinmux_config mmc0_pins[] = {
 	/* GP0[11] is required for SD to work on Rev 3 EVMs */
@@ -130,7 +130,7 @@
 	{ DAVINCI_LPSC_EMAC },	/* image download */
 	{ DAVINCI_LPSC_UART2 },	/* console */
 	{ DAVINCI_LPSC_GPIO },
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	{ DAVINCI_LPSC_MMC_SD },
 #endif
 };
@@ -210,7 +210,7 @@
 #endif
 
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 	if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0)
 		return 1;
 #endif
@@ -355,7 +355,7 @@
 	return 0;
 }
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 static struct davinci_mmc mmc_sd0 = {
 	.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
index 5ef383d..1ac9d66 100644
--- a/board/htkw/mcx/mcx.c
+++ b/board/htkw/mcx/mcx.c
@@ -100,7 +100,7 @@
 	MUX_MCX();
 }
 
-#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_MMC_OMAP_HS) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
 	return omap_mmc_init(0, 0, 0, -1, -1);
diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c
index d757d97..7e1766c 100644
--- a/board/lego/ev3/legoev3.c
+++ b/board/lego/ev3/legoev3.c
@@ -26,7 +26,7 @@
 #include <linux/errno.h>
 #include <hwconfig.h>
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 #include <mmc.h>
 #include <asm/arch/sdmmc_defs.h>
 #endif
@@ -39,7 +39,7 @@
 #define EEPROM_REV_OFFSET	0x3F00
 #define EEPROM_MAC_OFFSET	0x3F06
 
-#ifdef CONFIG_DAVINCI_MMC
+#ifdef CONFIG_MMC_DAVINCI
 static struct davinci_mmc mmc_sd0 = {
 	.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index f04f843..2ad9962 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -33,7 +33,7 @@
 	pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
 }
 
-#if defined(CONFIG_TEGRA_MMC)
+#if defined(CONFIG_MMC_SDHCI_TEGRA)
 /*
  * Do I2C/PMU writes to bring up SD card bus power
  *
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index e4c4bfb..cb9282e 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -34,7 +34,7 @@
 		ARRAY_SIZE(dalmore_padctrl));
 }
 
-#if defined(CONFIG_TEGRA_MMC)
+#if defined(CONFIG_MMC_SDHCI_TEGRA)
 /*
  * Do I2C/PMU writes to bring up SD card bus power
  *
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index c892a25..2945785 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -14,7 +14,7 @@
 #include <asm/arch/tegra.h>
 #include <asm/gpio.h>
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 4e01deb..b56bc52 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -25,7 +25,7 @@
 }
 #endif
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c
index 3476f11..db48978 100644
--- a/board/nvidia/whistler/whistler.c
+++ b/board/nvidia/whistler/whistler.c
@@ -15,7 +15,7 @@
 #include <asm/gpio.h>
 #include <i2c.h>
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)
diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c
index 4a3d094..ad4b02a 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -130,7 +130,7 @@
 	return 0;
 }
 
-#if defined(CONFIG_OMAP_HSMMC) && \
+#if defined(CONFIG_MMC_OMAP_HS) && \
 	!defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index c2de1fe..6b05541 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -291,7 +291,7 @@
 	return 0;
 }
 
-#if defined(CONFIG_OMAP_HSMMC) && \
+#if defined(CONFIG_MMC_OMAP_HS) && \
 	!defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index 4d298e6..7d574fb 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -82,7 +82,7 @@
 }
 #endif
 
-#ifdef CONFIG_TEGRA_MMC
+#ifdef CONFIG_MMC_SDHCI_TEGRA
 /*
  * Routine: pin_mux_mmc
  * Description: setup the pin muxes/tristate values for the SDMMC(s)